The IIS Chip Gallery
Billywig (2019)
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by
| Application | Pulp |
| Technology | 65 |
| Manufacturer | UMC |
| Type | Research |
| Package | QFN40 |
| Dimensions | 2626μm x 1252μm |
| Gates | 2 MGE |
| Voltage | 1.2 V |
| Power | 1 pW @ 1.2 V, 1 GHz mW |
| Clock | 350 MHz |
Billywig is a RISC-V based multicore system for processing regular data structures. It contains 4x Snitch a ultra small RV32IMAFD core with custom extensions to improve stream processing. This small core is then paired with a fairly large 64bit FPU (with 64, 64bit registers), which can be used as a single 64bit FPU or 2x 32bit FPUs in parallel. The instruction extensions can be used to program stream processing allowing the FPU to data directly, giving the core a pseudo dual issue capability. While the FPU is active, the integer core can still continue to execute code, particularly to update the configuration of the streaming subsystem (which uses shadow registers). We also add a shared integer multiply divide unit for 4x snitch cores to complement the capability of the cores while saving some area.
The system also includes 64kByte shared L1 memory that can be accessed by all cores, and a small (due to limited chip area) 16 kByte L2 memory to mimick the operation in a larger system, and shared instruction cache. All in all the system is optimized to maximize utilization of its resources while executing regular FP operations, such as matrix multiplications.
Billywig is a character with great speed from the Harry Potter universe and is from Fantastic Beasts and Where to Find Them. This continues a theme of Harry Potter themed RISC-V chips we have like Imperio.