The IIS Chip Gallery
Vodca (1992)
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by
| Application | Graphics |
| Technology | 1200 |
| Manufacturer | VLSI Tech |
| Type | Semester Thesis |
| Package | DIP40 |
| Dimensions | 3200μm x 3200μm |
| Gates | 5 kGE |
| Voltage | 5 V |
| Power | 370 mW(40 MHz, 5V) |
| Clock | 15 MHz |
Vodca stands for Video Optimized Data Compress Asic and implements the ADPCM kompression algorithm proposed by the IMA Digital Audio Technical Working Group.
The ASIC compresses 8-bit RGB or YUV components to either 2,3, or 4 bits using a delta compression algorithm with an adaptive step variation table.
After definition of the chip architecture each functional block has been synthesized using VHDL. In order to reach the required pixel frequency of 15 MHz some critical parts have been reentered as schematic and their function has been verified against the synthesized version. TYhe speed requirements could be met as wll by using timing constraints in the VHDL synthesizer, but at the cost of a much higher gate count.